Makefile -> Taskfile

Sat, 16 Apr 2022 00:00:00 +0000

Makefile

I add a Makefile to every project I work with. I don’t usually work on C/C++ projects or any other compiled languages but Makefile is good to make aliases for long commands.

Here is an example of short version of Makefile I use:


.PHONY: up
up:
	docker-compose up -d

.PHONY: logs
logs:
	tail -f ./storage/logs/*.log

There are set of aliases / mnemonics that I used to:

make up - start the project. May be docker-compose or set of commands to turn the project into “running” state
make down - stop everything make up did
make tags - generate tags
make logs - watch logs where ever they are

Since I work with multiple languages and frameworks, thanks to this approach, I don’t need to remember how to start a project, how to compile JS files, how to read logs, etc… All those commands are hidden under make targets.

On the other hand Makefiles aren’t designed for such use. make is super powerful tool and using it as an alias system just feels wrong.

Taskfile

Taskfile - is just a shell script where you can define functions to call.


function up {
    podman-compose up -d --build
}

function down {
    podman-compose down
}

function npm {
    podman run -it -v `pwd`:/app -w /app node:latest npm $@
}

function composer {
    podman-compose exec app composer $@
}

TIMEFORMAT="Task completed in %3lR"
time ${@:-default}

Place this file in your project root, make it executable and you can call those aliases with ./Taskfile up or ./Taskfile composer install.

To simplify this a bit add this line to you bashrc/zshrc:

alias run=./Taskfile

Now you can call all those commands as run up or run composer install. Pretty handy.

This idea was borrowed from Adrian Cooney and his Taskfile repo.

Make list targets [memo]

Mon, 08 Jan 2018 00:00:00 +0000

Here is small note about the target I put in every Makefile I have.

The target is called list and looks like this:

.PHONY: list
list:
    @$(MAKE) -pRrq -f $(lastword $(MAKEFILE_LIST)) : 2>/dev/null | awk -v RS= -F: '/^# File/,/^# Finished Make data base/ {if ($$1 !~ "^[#.]") {print $$1}}' | sort | egrep -v -e '^[^[:alnum:]]' -e '^$@$$'

It prints list of all targets defined in your Makefile.

Took it from this brilliant stackoverflow answer

Ruslan's Tech Blog

Makefile -> Taskfile

Makefile

Taskfile

Make list targets [memo]